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4 December 2014

The vertical inductor's structure allows for double the inductance per unit area, which reduces chip size and increases bandwidth

The vertical inductor's structure allows double the inductance per unit area; reducing chip size & increasing bandwidth.

A comparison of a standard planar inductor and the vertical inductor that demonstrates the area efficiency of the vertical structure
Comparison of a standard planar & vertical inductors demonstrates the area efficiency of the vertical structure

Researchers at the Dresden University of Technology in Germany have proposed the first broadband amplifier using vertical inductors. All circuits are built from passive components, and improved chip design requires passive-component miniaturisation and efficient structure.

Vertical inductors, such as those considered here, are passive inductors with the spiral plane oriented perpendicularly to the chip substrate, as in the lower figure. The main goal of vertical inductors is to save chip area, and thanks to their vertical structures, vertical inductors occupy chip area prevalently in one dimension and not in a square manner like conventional spiral inductors, which are placed in parallel to the substrate.

Not just small

It was important to the Dresden team that their design not only decreased the chip size but also improved performance, as Guido Belfiore, the leading author on of the Letter explained: “the vertical inductor we designed has been compared with three different octagonal inductors, and the vertical inductor featured the highest inductance per unit of area. The same vertical inductor implemented in a differential broadband amplifier and the use of a vertical inductor in this case increased the bandwidth of the amplifier by 25%.”

The comparison showed that a vertical inductor features almost double the inductance per unit of area than an octagonal spiral inductor with the same inductance and maximum number of loops. Importantly, explained Belfiore, “the maximum number of loops of the conventional inductor was limited by design checking rules.”

Efficiency over scaling

Efficient design of such devices is growing ever more important, explained Belfiore, as “the continuous scaling of active devices does not apply to passive structures such as on-chip capacitors and inductors.” Furthermore, analogue design with highly scaled technologies is becoming more and more complicated due to increasingly strict design rules.

“For instance,” Belfiore said, “local metal density needs to meet the design rules specification – conventional inductors are filled with dummy metal, decreasing the performance of the circuit.” Since vertical inductors can use all the metal layers of a given technology, it is easier to meet the metal density rules without dummy filling structures.

Close together

Since working on their Letter, the group have been designing new circuits using this vertical inductor technology. Belfiore told us that “the design of the vertical inductor is an important step in the research of our group, which focuses on innovation in broadband circuit design for optical communications.” One target is still to reduce the area in spite of speed improvement of broadband analogue circuits.

However, other applications of vertical inductors are also being investigated. The use of vertical inductors can be extended to on-chip transformers and multiple coupled on-chip inductors. “The geometrical characteristic of vertical inductors,” explained Belfiore, “allows the placing of multiple structures very close to each other, increasing mutual coupling factor.”

Extension via stacking

The increase in the demand for high data rate does not equate to the increase in the speed of active devices in analogue circuits. In the future it will, therefore, be necessary to study and investigate cost-effective bandwidth extension techniques and peaking with vertical inductors as candidates.

“In the framework of our project,” said Belfiore, “we investigate the impact of different types of connection in a 3D chip stack and one possible future application of vertical inductors is in these chip stacks.” A vertical inductor can be extended via multiple chips in the same stack using through silicon vias, he explained, and “in this case very area-effective inductors can be manufactured. The flip-chip technology will develop with the introduction of through silicon vias and 3D chip stacks will open new possible scenarios in the application of multi-chip vertical inductors.”

Further reading

This article is based on the letter 'Measurement and application of vertical inductors in high-speed broadband circuit' (new window)

A PDF version (new window) of this feature is also available

Journal content

Cover of Electronics Letters, Volume 49, Issue 25

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