Books
System On Chip: Next Generation Electronics
By Bashir M. Al-Hashimi (Ed.)
Price: £69 / $124
Format: Hardback
Product Code: PBCS0180
ISBN: 0-86341-552-0 & 978-0-86341-552-4
Pagination: 944pp.
Description
Scope: System-on-Chip (SoC) represents the next major market for microelectronics, and there is considerable interest world-wide in developing effective methods and tools to support the SoC paradigm. SoC is an expanding field, at present the technical and technological literature about the overall state-of-the-art in SoC is dispersed across a wide spectrum which includes books, journals, and conference proceedings. The book provides a comprehensive and accessible source of state-of-the-art information on existing and emerging SoC key research areas, provided by leading experts in the field. This book covers the general principles of designing, validating and testing complex embedded computing systems and their underlying tradeoffs. The book has twenty five chapters organised into eight parts, each part focuses on a particular topic of SoC. Each chapter has some background covering the basic principles, and extensive list of references. It is aimed at graduate students, designers and managers working in Electronic and Computer engineering.
About the Editor: Bashir M. Al-Hashimi is Professor of Computing Engineering at the School of Electronics and Computer Science, University of Southampton, UK.
Contributing Editors:
Simon Kunzli, Lothar Tiele, Eckart Zitzler, Networks Lab, Switzerland
Rafik Henia, Arne Hamann, Marek Jersak, Razvan Racu, Kai Richter, Rolf Ernst, Technical University of Braunschweig, Germany
Paul Pop, Petru Eles, Zebo Peng, Linköping University, Sweden
Jaehwan John Lee, Indiana Univ - Purdue Univ. Indianapolis, USA
Vincent John Mooney III, Georgia Institute of Technology, USA
Axel Jantsch, Ingo Sande, Royal Institute of Technology , Sweden
Prabhat Mishra, University of Florida, USA
Nikil Dutt, University of California, USA
Gunnar Braun, CoWare Inc., Germany
Edward Lee, Stephen Neuendorffer, University of California, USA
Rainer Leupers, Manuel Hohenauer, Kingshuk Karuri, Jianjiang Ceng, Hanno Scharwaechter, Heinrich Meyr, Gerd Ascheid, Institute for Integrated Signal Processing Systems, Germany
J.S. Hu, G. Chen, M. Kandemir, N. Vijaykrishnan, Pennsylvania State University, USA
P. Marcha,l, F. Catthoor, IMEC, Belgium
J.I. Gomez, D. Atienza, Universidad Complutense de Madrid, Spain
S. Mamagkakis, Democritus University of Thrace, Greece
Niraj K. Jha, Princeton University, USA
Afshin Abdollahi, Massoud Pedram, University of Southern California, USA
Amit Agarwal, Saibal Mukhopadhyay, Chris H. Kim, Arijit Raychowdhury, Kaushik Roy, Purdue University, USA
G.A. Constantinides, P. Y. K. Cheung, Imperial College, London
T.J. Todman, O. Mencer, W. Luk, Imperial College, London
S.J.E. Wilton, University of British Columbia, Canada
Georges G.E. Gielen, Katholieke Universiteit Leuven, Belgium
Danil Sokolov, Alex Yakovlev, University of Newcastle upon Tyne, UK
Luca Benini, Davide Bertozzi, Universit‘a di Bologna, Italy
Manish Amde, University of California at San Diego, USA
Aristides Efthymiou, University of Edinburgh, UK
Tomaz Felicijan, Douglas Edwards, University of Manchester, UK
Luciano Lavagno, Italy
Ian G. Harris, University of California, USA
Sungjoo Yoo, Samsung Electronics, Korea
A Jerraya, System-Level Synthesis Group, France
Rolf Drechsler Daniel Große, University of Bremen, Germany
Krishnendu Chakrabarty, Duke University, USA
Ian G. Harris, University of California, USA
Sandeep Kumar Goel, Erik Jan Marinissen, Philips Research Laboratories, The Netherlands
Peter M. Levine, Gordon W. Roberts, McGill University, Canada
Adit D. Singh, Auburn University, USA
Thomas S. Barnett, IBM Microelectronics, USA
Book Review
Original content:
<div xmlns:st2="urn:www.microsoft.com/smarttags2" xmlns:st1="urn:www.microsoft.com/smarttags" class="rxbodyfield" xmlns:o="urn:www.microsoft.com/office" xmlns:x="urn:www.microsoft.com/excel" xmlns:w="urn:www.microsoft.com/word"><p>"From my perspective, the coverage was good." "...the most useful chapters were by Paul Pop, Jaehwan John Lee, Prabhat Mishra, Edward Lee, J Hu, P Marchal and Niraj Jha. Overall, I liked this book (which is why my lab now has three copies). I think the author has succeeded in assembling a very useful review of the current state of the art (which I will hand out to many of my new PhD students as they start projects in the next couple of years)." <I>Dr. Michael J. Pont, Leicester University</I> <a href="http://www.le.ac.uk/eg/mjp9/">(http://www.le.ac.uk/eg/mjp9/)</a><BR><BR>"...the book has been edited in a seamless way with each paper being assigned its own chapter number with the figures numbered in kind. Each paper within the book stands alone without essentially relying on the material contained in any other paper in the book. Each paper presents its material in a concise way; if not occasionally dry, with a definite beginning, discussion and conclusion. Although the material does stand alone, each paper is heavily referenced with twenty or thirty references provided in some cases. There are a number of instances where in order to understand the content of the article it is necessary to also have read the references. This is especially the case where the paper is building on top of previous research in the subject." "The forward to the book states that the intended usage for the book is students, academics, designers and managers involved in System-on-Chip design. In fairness, the book meets its own aspiration in this regard. This is not to say that these are the only possible markets - any company with an interest in System-on-Chip would benefit from a copy on the shelves of the corporate library." Mark Tickner</p></div>Book Readership
The book will be of interest to post graduates, designers and managers as well as those working in electronic and computer engineering.
Book Contents
Preface. Part 1 - System Level Design. Part 2 - Embedded Software. Part 3 - Power Reduction and Mangement. Part 4 - Reconfigurable Computing. Part 5 - Architectural Synthesis. Part 6 - Network on Chip. Part 7 - Simulation and Verification. Part 8 - Manufacturing Test
*This file is in Acrobat®PDF format
Level
Electronic and Computer engineering