Interview with Kun Mao

10 October 2013

Dr Kun Mao

Dr Kun Mao

How did you get into this area of research?

When I was a child I was very interested in physical science, and when I first disassembled a computer, I thought the CPU, hard drive and video card were so cool! I majored in microelectronics through the bachelor’s, Master's and doctor’s stages, and these academic experiences helped me understand this field and encourage my interests simultaneously. Furthermore, the microelectronics industry is flourishing and receives strong support in China, which creates a lot of job opportunities for our youth.

What are you working on at the moment?

These days I mainly study high voltage BCD process technology and high voltage power devices. Our team has developed two 700 V BCD process technologies and accomplished industrialisation in 2011. Both of them have the advantage of low-cost and high reliability. 700 V DMOS has ultra-low Ron,sp which is based on traditional triple RESURF technology. Before this, there was no mature 700 V process technology in our country.

What have you reported in your Electronics Letters paper?

The paper proposes an advanced low-cost and low-power high voltage start-up circuit which uses a 50 V p-type JFET and a 700 V triple RESURF n-type JFET. This technology gives a solution for low-cost and low-power high voltage start-up circuit. Compared with traditional technology, a lot of the module area is saved. This is mainly due to: first, with the increase of VDS, leakage current in the off-state can be quickly pinched off to a low value by the pJFET without a large layout area; second, the triple RESURF nJFET is located at the drain terminal of the triple RESURF nLDMOS with the common drain electrode. Moreover, pJFET brings stable and low IOFF which leads to 4 mW static power consumption in off-state due to its low pinch-off voltage and high breakdown voltage.

What does this mean for applications using start-up circuits?

HV JFET or depletion mode DMOS have both been widely used in HV start-up circuits, which is applied in high voltage AC-DC converters, LED drivers etc.. On the one hand, due to the application of ultra-high voltages, independent power devices usually need large layout areas that will increase the cost of IC. On the other hand, this power device is usually difficult to turn off and will produce some loss during the off-state. This brings difficulty for design of lower-power IC. Therefore, a low-cost and low-power high voltage start-up circuit is required.

What are the next steps?

Next we will concentrate on the reliability of this circuit, especially the HV 700 nJFET because we found that, after we finished some long-time high-temperature speedup life tests, the charging current and off-state current increased, and the breakdown voltage of both 700 V nJFET and 50 V pJFET decreased. From here, we think that electric field distribution and mobile ions produced in process steps may be the main research direction of our work.

How do you think this area will develop over the next 10 years

Due to the complicated peripheral circuit for traditional start-up circuits outside the controller, technology of a high voltage start-up circuit integrated with a controller may be the mainstream direction in the design of AC-DC converters or LED drivers in future. Using this, technology such as phone chargers, adapters and many other appliances will have lower stand-by power which can observably save your electricity usage. However, integrating the start-up circuit will bring extra power losses, extra layout area and the problem of reliability for the IC which may be the main research direction of this field in the future. The power of high voltage start-up circuit is the chief component of the static power of ICs, so I would like to see the emergence of an ultra-low power high voltage start-up circuit.

Further reading

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Journal content

Cover of Electronics Letters, volume 50, issue 17

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Browse or search all papers in the latest or past issues of Electronics Letters on the IET Digital Library.