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Web shop
Low Power and Low Voltage Circuit Design with the FGMOS Transistor
IET Digital Library
This title is available electronically through the IET Digital Library
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Author: Esther Rodriguez-Villegas
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Year: 2006
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Format: Hardback
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Product Code: PBCS0200
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ISBN: 978-0-86341-617-0
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Pagination: 320pp.
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Stock Status: In stock
£48.75 Member price
£75.00 Full price
Description
Scope: This new book demonstrates how FGMOS transistors can be used in a low voltage and low power design context. The techniques used provide innovative solutions, often in situations where the limits of the technology in question have been pushed far below the values recommended by the manufacturer.
Motivated by consumer demand for smaller, more portable electronic devices, which offer more features and operate for longer on their existing battery packs, cutting edge electronic circuits need to be even more power efficient. This requires the circuit designer to have an understanding of the latest low voltage and low power (LV/LP) techniques which makes use of the floating gate MOS (FGMOS) transistor.
About the Author: Esther Rodriguez-Villegas graduated from the University of Seville in 1996 and is currently a lecturer in the Circuits and Systems Group at Imperial College, London.
Book readership
The book will be of interest to undergraduates, postgraduate and postdoctoral research students, circuit designers and academics.
